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## avrora.sim.mcu
Class ATMega128L.SimImpl

    java.lang.Object
      avrora.sim.Simulator
          avrora.sim.mcu.ATMega128L.SimImpl

All Implemented Interfaces:
  IORegisterConstants

Enclosing class:
  ATMega128L

public class ATMega128L.SimImpl
extends Simulator

Nested Class Summary
`protected class` | `ATMega128L.SimImpl.ADC` Analog to digital converter.
`protected class` | `ATMega128L.SimImpl.DirectionRegister`
`protected class` | `ATMega128L.SimImpl.EEPROM` This is an implementation of the non-volatile EEPROM on the ATMega128 microcontroller.
`protected class` | `ATMega128L.SimImpl.LCDScreen` Debug class.
`protected class` | `ATMega128L.SimImpl.PinRegister`
`protected class` | `ATMega128L.SimImpl.PortRegister`
`protected class` | `ATMega128L.SimImpl.SPI` Serial Peripheral Interface.
`protected class` | `ATMega128L.SimImpl.SPIPrinter` Debug class.
`protected class` | `ATMega128L.SimImpl.StandardClock`
`protected class` | `ATMega128L.SimImpl.Timer0` `Timer0` is the default 8-bit timer on the ATMega128L.
`protected class` | `ATMega128L.SimImpl.Timer0ExternalClock`
`protected class` | `ATMega128L.SimImpl.Timer1` `Timer1` is a 16-bit timer available on the ATMega128L.
`protected class` | `ATMega128L.SimImpl.Timer16Bit` The `Timer16Bit` class emulates the functionality and behavior of a 16-bit timer on the Atmega128L.
`protected class` | `ATMega128L.SimImpl.Timer2` `Timer2` is an additional 8-bit timer on the ATMega128L.
`protected class` | `ATMega128L.SimImpl.Timer3` `Timer3` is an additional 16-bit timer available on the ATMega128L, but not in ATMega103 compatability mode.
`protected class` | `ATMega128L.SimImpl.Timer8Bit` Base class of 8-bit timers.
`protected class` | `ATMega128L.SimImpl.USART` The USART class implements a Universal Synchronous Asynchronous Receiver/Transmitter, which is a serial device on the ATMega128L.
`protected class` | `ATMega128L.SimImpl.USART0` Emulates the behavior of USART0 on the ATMega128L microcontroller.
`protected class` | `ATMega128L.SimImpl.USART1` Emulates the behavior of USART1 on the ATMega128L microcontroller.

Nested classes inherited from class avrora.sim.Simulator
`Simulator.BreakPointException, Simulator.ClockCycleTimeout, Simulator.Event, Simulator.FlagRegister, Simulator.InstructionCountTimeout, Simulator.Interrupt, Simulator.MaskableInterrupt, Simulator.MaskRegister, Simulator.Probe, Simulator.TimeoutException, Simulator.UnorderedFlagRegister, Simulator.UnorderedMaskRegister, Simulator.Watch`

Field Summary
`protected ATMega128L.SimImpl.ADC` | `adc`
`protected Simulator.FlagRegister` | `EIFR_reg`
`protected Simulator.MaskRegister` | `EIMSK_reg`
`protected Simulator.UnorderedFlagRegister` | `ETIFR_reg`
`protected Simulator.UnorderedMaskRegister` | `ETIMSK_reg`
`static int` | `EXT_VECT`
`static int` | `RES_VECT`
`protected ATMega128L.SimImpl.SPI` | `spi`
`protected Simulator.FlagRegister` | `TIFR_reg`
`protected Simulator.MaskRegister` | `TIMSK_reg`

Fields inherited from class avrora.sim.Simulator
`eventQueue, IGNORE, interpreter, interrupts, LEGACY_INTERPRETER, MAX_INTERRUPTS, microcontroller, program, TRACEPROBE`

Fields inherited from interface avrora.sim.IORegisterConstants
`ACSR, ADCH, ADCL, ADCSRA, ADMUX, ASSR, DDRA, DDRB, DDRC, DDRD, DDRE, DDRF, DDRG, EEARH, EEARL, EECR, EEDR, EICRA, EICRB, EIFR, EIMSK, ETIFR, ETIMSK, ICR1H, ICR1L, ICR3H, ICR3L, MCUCR, MCUCSR, NUM_REGS, OCDR, OCR0, OCR1AH, OCR1AL, OCR1BH, OCR1BL, OCR1CH, OCR1CL, OCR2, OCR3AH, OCR3AL, OCR3BH, OCR3BL, OCR3CH, OCR3CL, OSCCAL, PINA, PINB, PINC, PIND, PINE, PINF, PING, PORTA, PORTB, PORTC, PORTD, PORTE, PORTF, PORTG, RAMPZ, SFIOR, SPCR, SPDR, SPH, SPL, SPMCSR, SPSR, SREG, SREG_C, SREG_H, SREG_I, SREG_N, SREG_S, SREG_T, SREG_V, SREG_Z, TCCR0, TCCR1A, TCCR1B, TCCR1C, TCCR2, TCCR3A, TCCR3B, TCCR3C, TCNT0, TCNT1H, TCNT1L, TCNT2, TCNT3H, TCNT3L, TIFR, TIMSK, TWAR, TWBR, TWCR, TWDR, TWSR, UBRR0H, UBRR0L, UBRR1H, UBRR1L, UCSR0A, UCSR0B, UCSR0C, UCSR1A, UCSR1B, UCSR1C, UDR0, UDR1, WDTCR, XDIV, XMCRA, XMCRB`

Constructor Summary
`ATMega128L.SimImpl(Program p)`

Methods inherited from class avrora.sim.Simulator
`delay, forceInterrupt, getInterruptVectorAddress, getMicrocontroller, getProgram, getState, insertBreakPoint, insertEvent, insertPeriodicEvent, insertProbe, insertProbe, insertTimeout, insertWatch, removeBreakPoint, removeEvent, removeProbe, removeProbe, removeWatch, reset, start, stop, triggerInterrupt`

Methods inherited from class java.lang.Object
`clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait`

Field Detail

### RES_VECT

    public static final int RES_VECT

See Also:
  Constant Field Values

### EXT_VECT

    public static final int EXT_VECT

See Also:
  Constant Field Values

### EIFR_reg

    protected Simulator.FlagRegister EIFR_reg

### EIMSK_reg

    protected Simulator.MaskRegister EIMSK_reg

### TIFR_reg

    protected Simulator.FlagRegister TIFR_reg

### TIMSK_reg

    protected Simulator.MaskRegister TIMSK_reg

### ETIFR_reg

    protected Simulator.UnorderedFlagRegister ETIFR_reg

### ETIMSK_reg

    protected Simulator.UnorderedMaskRegister ETIMSK_reg

### spi

    protected ATMega128L.SimImpl.SPI spi

### adc

    protected ATMega128L.SimImpl.ADC adc

Constructor Detail

### ATMega128L.SimImpl

    public ATMega128L.SimImpl(Program p)

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