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java.lang.Objectavrora.sim.Simulator
avrora.sim.mcu.ATMega128L.SimImpl
| Nested Class Summary | |
protected class |
ATMega128L.SimImpl.DirectionRegister
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protected class |
ATMega128L.SimImpl.PinRegister
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protected class |
ATMega128L.SimImpl.PortRegister
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protected class |
ATMega128L.SimImpl.SPI
SPI Class by Simon |
protected class |
ATMega128L.SimImpl.Timer0
The Timer0 class emulates the functionality and behavior of the
8-bit timer on the Atmega128L. |
| Nested classes inherited from class avrora.sim.Simulator |
Simulator.BreakPointException, Simulator.ClockCycleTimeout, Simulator.FlagRegister, Simulator.InstructionCountTimeout, Simulator.Interrupt, Simulator.MaskableInterrupt, Simulator.MaskRegister, Simulator.MemoryProbe, Simulator.Probe, Simulator.TimeoutException, Simulator.Trigger |
| Field Summary | |
protected Simulator.FlagRegister |
EIFR_reg
|
protected Simulator.MaskRegister |
EIMSK_reg
|
static int |
EXT_VECT
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static int |
RESET_VECT
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protected Simulator.FlagRegister |
TIFR_reg
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protected Simulator.MaskRegister |
TIMSK_reg
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| Fields inherited from class avrora.sim.Simulator |
activeProbe, cyclesConsumed, eventQueue, IGNORE, interrupts, justReturnedFromInterrupt, MAX_INTERRUPTS, microcontroller, nextPC, program, shouldRun, sleeping, state, TRACEPROBE |
| Fields inherited from interface avrora.sim.IORegisterConstants |
ACSR, ADCH, ADCL, ADCSRA, ADMUX, ASSR, DDRA, DDRB, DDRC, DDRD, DDRE, DDRF, DDRG, EEARH, EEARL, EECR, EEDR, EICRA, EICRB, EIFR, EIMSK, ETIFR, ETIMSK, ICR1H, ICR1L, ICR3H, ICR3L, MCUCR, MCUCSR, NUM_REGS, OCDR, OCR0, OCR1AH, OCR1AL, OCR1BH, OCR1BL, OCR1CH, OCR1CL, OCR2, OCR3AH, OCR3AL, OCR3BH, OCR3BL, OCR3CH, OCR3CL, OSCCAL, PINA, PINB, PINC, PIND, PINE, PINF, PING, PORTA, PORTB, PORTC, PORTD, PORTE, PORTF, PORTG, RAMPZ, SFIOR, SPCR, SPDR, SPH, SPL, SPMCSR, SPSR, SREG, SREG_C, SREG_H, SREG_I, SREG_N, SREG_S, SREG_T, SREG_V, SREG_Z, TCCR0, TCCR1A, TCCR1B, TCCR1C, TCCR2, TCCR3A, TCCR3B, TCCR3C, TCNT0, TCNT1H, TCNT1L, TCNT2, TCNT3H, TCNT3L, TIFR, TIMSK, TWAR, TWBR, TWCR, TWDR, TWSR, UBRR0H, UBRR0L, UBRR1H, UBRR1L, UCSR0A, UCSR0B, UCSR0C, UCSR1A, UCSR1B, UCSR1C, UDR0, UDR1, WDTCR, XDIV, XMCRA, XMCRB |
| Constructor Summary | |
ATMega128L.SimImpl(Program p)
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|
| Methods inherited from class java.lang.Object |
clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait |
| Field Detail |
public static final int RESET_VECT
public static final int EXT_VECT
protected Simulator.FlagRegister EIFR_reg
protected Simulator.MaskRegister EIMSK_reg
protected Simulator.FlagRegister TIFR_reg
protected Simulator.MaskRegister TIMSK_reg
| Constructor Detail |
public ATMega128L.SimImpl(Program p)
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